Method and device for decoding a sequence of physical signals, reliability detection unit and viterbi decoding unit

ABSTRACT

A method and device for decoding a sequence of physical signals. A Viterbi algorithm is carried out a first time for all physical signals, resulting in a maximum likelihood path, wherein there is one signal value for each physical signal and which has been determined along the entire trellis according to the Viterbi algorithm. A reliability value is determined for each signal value of the maximum likelihood path. The Viterbi algorithm is then carried out a second time with the following steps: selecting one subregion of the trellis, the subregion having a partial initial signal value and a partial end signal value on the maximum likelihood path; determining one further path in that subregion of the trellis which ends at the partial end signal value of the maximum likelihood path; determining each signal value on the further path and comparing same with the corresponding signal value on the maximum likelihood path relating to the same time; depending on the comparison result, the signal value of the maximum likelihood path is allocated the reliability value determined in the previous iteration step or the minimum of this and the reliability value of the partial end signal value; shifting the subregion of the trellis by at least one time unit; and using, storing and/or outputting the determined signal values and selected reliability values associated with the signal values as the decoded sequence.

[0001] The invention relates to a method and a device for decoding asequence of physical signals.

[0002] A method such as this and a device such as this are known from[1].

[0003] [1] describes the principles of the so-called Viterbi algorithm.

[0004] The Viterbi algorithm, which is frequently used for channeldecoding of received physical signals that are subject to disturbances,determines a sequence of signal values along a so-called trellis for thereceived physical signals. The probability of the determined sequence ofsignal values corresponding to the sequence of received physical signalsis in each case maximized for the sequence of signal values. Theprocedure which is known from [1] is used to make a decision on a binarybasis for each signal value as to whether a signal value has a firstbinary value or a second binary value.

[0005] The procedure which is known from [1] has the particulardisadvantage that, during the decoding process, it is not evident howreliable the decision is as to whether the respectively determinedsignal value actually corresponds to the originally transmitted signalvalue.

[0006] The method from [1] therefore provides no reliability informationwhatsoever on the quality of the channel decoding process.

[0007] In order to improve the method which is known from [1], it isknown from [2] for each determined signal value to be allocatedreliability information, which is referred to as a reliability value inthe following text, in the course of the channel decoding of thereceived, noisy (that is to say subject to disturbances) physicalsignal. The reliability value in each case indicates the reliability ofthe respective decision which has been made to classify the receivedsignal as the corresponding signal value. This obviously means that thereliability value indicates the extent to which the received signal issimilar to the first binary signal value or to the second binary signalvalue.

[0008] The reliability values are formed, for example, as a function ofso-called state metrics which are calculated while passing through thetrellis in the course of the channel decoding process.

[0009] In the method which is known from [2], the reliability values aredetermined in the course of a single run through the Viterbi algorithm.

[0010] However, it has been found that this procedure is not optimal,especially and in addition with regard to implementation in hardware.

[0011] In order to improve the procedure which is known from [2], themethod which is described in [3] has been developed, in which theViterbi algorithm is run twice, with only the signal values beingdetermined in the course of the first “run”, and the reliability valuesbeing determined in the course of a second run. The result of the first“run” is a “maximum likelihood path” which contains those signal valueswhich have been determined using a path traceback method (backtracingmethod). The signal values which are located on the maximum likelihoodpath are used as the decoded physical signals.

[0012] In the procedure which is known from [3], while the second run ofthe Viterbi algorithm is carried out for a large number of further pathsalong the entire trellis, with the further paths all having the samelength as the maximum likelihood path, namely the length correspondingto the sequence of received physical signals, reliability values aredetermined and the respective reliability value associated with thesignal value is determined as a function of the reliability values ofthe signal values of the maximum likelihood path and determinedreliability values for signal values on the further paths.

[0013] This procedure is highly complex and, in practice, cannot be usedin real time for the decoding of physical signals, in particular in thefield of mobile radio.

[0014] It is also known from [4] and [5] for the Viterbi algorithm notto be carried out for the entire sequence of physical signals but onlyfor a partial sequence and for the signal values to be determinedstep-by-step along the trellis, with further paths being formed in thecourse of the Viterbi algorithm and further reliability values beingallocated to the determined signal values for these further paths, whichfurther reliability values are compared with the reliability values ofthe signal values on the maximum likelihood path, which has not yet beencompletely determined at this time, on the basis of which the finalreliability values which are associated with the determined signalvalues are chosen.

[0015] The method which is known from [4] and [5] has the particulardisadvantage that convergence of the Viterbi algorithm is not alwaysguaranteed for each of the subregions which are taken into account inorder to determine the further paths.

[0016] Another method for determining a maximum likelihood path is knownfrom [6]. In this method, a first maximum likelihood path is determined,and an additional quasi-maximum likelihood path is then chosen, and itsreliability values are compared with those of the first maximumlikelihood path.

[0017] Another Viterbi decoder is described in [7].

[0018] The invention is thus based on the problem of determiningreliability values for signal values in the course of the Viterbialgorithm, with the determined reliability values having a reliabilitywhich is better than that of the known methods in the stochastic sense,or is at least equivalent to them. Furthermore, it is intended to bepossible to use the method for mobile radio, in which case it isdesirable for the computation complexity both in software and inhardware to be as low as possible.

[0019] The problem is solved by the method, the device, the reliabilityvalue determining unit and the Viterbi decoding unit having the featuresof the independent patent claims.

[0020] In a method for decoding a sequence of physical signals, aViterbi algorithm is carried out a first time for all physical signals.The first “run” of the Viterbi algorithm results in a maximum likelihoodpath which has been determined along the entire trellis that resultsaccording to the Viterbi algorithm. The maximum likelihood path has onesignal value for each physical signal. A reliability value is determinedfor each signal value of the maximum likelihood path determined usingthe Viterbi algorithm. The Viterbi algorithm is now carried out a secondtime, with the following method steps being carried out iterativelyuntil all the signal values of the determined trellis have been takeninto account:

[0021] one subregion of the trellis is selected, with that subregionhaving a partial initial signal value and a partial end signal value onthe maximum likelihood path,

[0022] at least one further path is determined in that subregion of thetrellis which ends at the partial end signal value of the maximumlikelihood path,

[0023] each signal value on the further path is determined and iscompared with the corresponding signal value on the maximum likelihoodpath relating to the same time,

[0024] depending on the comparison result, the signal value of themaximum likelihood path is allocated the reliability value determined inthe previous iteration step or the minimum of this and the reliabilityvalue of the partial end signal value,

[0025] in a subsequent iteration step, the subregion of the trellis ispreferably shifted by at least one time unit.

[0026] The determined signal values and the selected reliability valuesassociated with the signal values, as have been determined on the basisof the second run of the Viterbi algorithm, are used and stored and/oroutput as the decoded sequence.

[0027] A device for coding a sequence of physical signals has aprocessor which is set up such that the method steps, as describedabove, in the method for decoding a sequence of physical signals can becarried out.

[0028] A reliability value determining unit for determining areliability value in the course of a Viterbi algorithm has a first pathmemory for storing signals of a maximum likelihood path according to theViterbi algorithm. Furthermore, a second path memory is provided, forstoring signal values of a further path according to the Viterbialgorithm. A first selection unit is coupled to the first path memoryand to the second path memory, and is used for evaluating signal valuesfrom the first path memory and from the second path memory. A comparisonunit is coupled to the selection unit and is used for comparing thechosen signal values from the first path memory and those from thesecond path memory with one another. A second selection unit has acontrol input, a first input and a second input. The control input iscoupled to the output of the comparison unit. The first input is coupledto the output of a third selection unit. Furthermore, a reliabilityvalue memory is provided for storing reliability values. A control unitwhich is also provided is set up such that a previously determined andstored first reliability value, which is associated with a signal valueon the maximum likelihood path, can be read from the reliability valuememory and can be supplied to a first input of the third selection unit.Furthermore, the control unit is set up such that a previouslydetermined and stored second reliability value, which is associated witha signal value on the maximum likelihood path, can be supplied from thereliability value memory to a second input of the third selection unit.The control unit is furthermore set up such that the first reliabilityvalue can be supplied to the second input of the second selection unit.If the selected signal values from the first path memory and from thesecond path memory are not the same, the comparison unit can supply acontrol signal to the second selection unit such that the secondselection unit can select the reliability value which is present at itsfirst input and has been chosen by the third selection unit.

[0029] A Viterbi decoding unit has the reliability value determiningunit described above.

[0030] The invention results in improved decoding of the sequence ofphysical signals using the Viterbi algorithm. In particular, the qualityis improved, that is to say the stochastic reliability of thereliability values which are associated with the respective signalvalues and are output as soft decision values by the Viterbi decoder, asa result of which the reliability of the individual signal values fortheir further processing is improved.

[0031] It should be noted that, according to the invention, the maximumlikelihood path has been determined along the overall trellis thatresults according to the Viterbi algorithm before the Viterbi algorithmis carried out a second time, and that the signal values of furtherpaths are compared with the signal values of the maximum likelihood pathin the course of the second run.

[0032] Preferred developments of the invention can be found in thedependent claims.

[0033] The refinements of the invention which are described in thefollowing text relate not only to the method, the device and thereliability value determining unit, but also to the Viterbi decodingunit.

[0034] A binary value may be used as the signal value. This refinementsimplifies the implementation of the invention since only binary valuesneed be processed, as a result of which, for example, only one bit isrequired for each signal value for the purposes of storing the signalvalues.

[0035] A further refinement of the invention provides for at least oneinitial signal value to be predetermined at the start of the sequence ofphysical signals and/or for at least one end signal value to bepredetermined at the end of the sequence of physical signals.

[0036] A region which has a predetermined number of signal values can beselected as the subregion of the trellis that is to be selected.

[0037] According to one refinement of the invention, a number of signalvalues, with this number being dependent on the reversion depth of theconvolution polynomials that are used, are in each case used as asubregion of the trellis.

[0038] The further path can in each case be determined in one iterationby inverting the signal value of the signal value which is passed to therespective partial end signal value according to the maximum likelihoodpath, and a renewed path traceback method is carried out on the basis ofthe partial end signal value, starting with the inverted signal value.The renewed path traceback method makes use of path tracebackinformation which was determined during the first run of the Viterbialgorithm or which occurs once again during the second run.

[0039] Each signal value on the maximum likelihood path is compared withthe signal value of the further concurrent path. If the comparisonresults in a match, then the reliability value of the signal value whichis located on the maximum likelihood path is not changed. If thecomparison does not result in a match, then the minimum of thereliability value determined in a previous iteration and the reliabilityvalue of the partial end signal value is used for the relevant signalvalue on the maximum likelihood path.

[0040] The difference from accumulated signal value metrics which areformed while running the Viterbi algorithm may be used as a firstapproximation of the reliability value.

[0041] In one development of the invention, the second selection unit isa multiplexer.

[0042] According to a further refinement of the invention, the firstselection unit is set up such that signal values relating to the sametime unit are in each case selected.

[0043] The third selection unit can be set up such that it selects thelower reliability value of the first reliability value and the secondreliability value.

[0044] According to a further refinement of the invention, the followingcomponents are provided in the device:

[0045] a transition metrics determining unit for determining atransition metric,

[0046] an end state metric determining unit, which is coupled to thetransition metric determining unit, for determining an end state metric,

[0047] a reliability value determining unit which is coupled to the endstate metric determining unit, and

[0048] a path traceback unit, which is coupled to the reliability valuedetermining unit and to the end state metric determining unit, fordetermining path traceback information.

[0049] Furthermore, a memory can be provided,

[0050] with a memory area for storing path traceback information and/or

[0051] having a second memory area for storing soft input informationfor the decoding unit and/or

[0052] with a third memory area for storing determined state metrics andstate transition metrics and/or

[0053] with a fourth memory area for storing signal values which areintended to be output, and reliability values associated with the signalvalues.

[0054] At least one of the memory areas may be in the form of RAM, sothat the respective memory areas are integrated in the electricalcircuit, thus furthermore considerably speeding up the decoding process.

[0055] Furthermore, the path traceback unit may have the followingcomponents:

[0056] a control unit, and

[0057] a multiplexer which is coupled via a control input to the controlunit,

[0058] in which case it is possible to use the control unit to selectwhether information about the maximum likelihood path or about therespective further concurrent path is selected by the first multiplexer,

[0059] in which case the respective start state for the path tracebackmethod within the further concurrent path can be supplied to a firstinput of the first multiplexer,

[0060] in which case information as to whether a transition bit isintended to be inverted for the traceback of the further path can besupplied as a second input of the first multiplexer,

[0061] in which case the respective time to which the start staterelates can be supplied at a third input of the first multiplexer,

[0062] in which case the respective start state of the maximumlikelihood path can be supplied at a fourth input of the firstmultiplexer, and

[0063] in which case the respective time to which the start state of themaximum likelihood path relates can be supplied as a fifth input of thefirst multiplexer.

[0064] One exemplary embodiment of the invention will be explained inmore detail in the following text and is illustrated in the figures, inwhich:

[0065]FIG. 1 shows a block diagram illustrating the reliability valuedetermining unit according to one exemplary embodiment of the invention.

[0066]FIG. 2 shows a block diagram, illustrating the sending, thetransmission and the reception of an electrical physical signal.

[0067]FIG. 3 shows a sketch of a butterfly structure, on the basis ofwhich the Viterbi algorithm will be explained in more detail.

[0068]FIG. 4 shows a block diagram illustrating a path traceback method.

[0069]FIG. 5 shows a sketch illustrating the procedure according to theexemplary embodiment of the invention.

[0070]FIG. 6 shows a sketch illustrating the procedure according to theexemplary embodiment of the invention, in detail.

[0071]FIG. 7 shows a block diagram of a Viterbi decoding unit accordingto one exemplary embodiment of the invention.

[0072]FIG. 8 shows a sketch of a path traceback unit for the Viterbidecoding unit according to one exemplary embodiment of the invention.

[0073]FIG. 2 shows, symbolically, a source 201 from which a message 202is intended to be transmitted from a transmitter 200 to a sink 219 in areceiver 211.

[0074] The message 202 to be transmitted is supplied to a source coder203, where it is compressed such that, although no information is lost,redundant information that is superfluous for the decoding of themessage 202 is eliminated, and the required transmission capacity isthus reduced.

[0075] The source coder 202 emits a code word 204

uε{±1}^(k),  (1)

[0076] which consists of a sequence of digital values. In this case, theassumption is made for each code word 204 u that each value u_(i), i=1,. . . , k, of each code word 204 u has an equal probability of assuminga first binary value (logic “0”) or a second binary value (logic “1”).

[0077] The code word 204 u is supplied to a unit for channel coding 205,in which channel coding of the code word 204 u is carried out. Duringthe channel coding process, redundant information is deliberately addedto the code word 204 u in order to make it possible to correct, or atleast to identify, any transmission errors which may occur during thetransmission process, thus achieving a high level of transmissionreliability.

[0078] The following text is based on the assumption that the channelcoding process results in each code word 204

uε{±1}^(k)

[0079] being allocated a channel code word 206

cε{±1}^(n), n>k, nεN  (2).

[0080] The output of the unit for channel coding 205 thus consists ofthe channel code word c 206.

[0081] The channel code word c 206 is supplied to a unit for modulation207 of the channel code word c 206.

[0082] During the modulation process, the channel code word c 206 isassociated with a function

s=

→

  (3)

[0083] which is suitable for transmission via a physical channel 208.

[0084] The modulated signal 209 to be transmitted thus contains bothsignal information and redundant information determined from the signalinformation.

[0085] The modulated signal s 209 is transmitted via the physicalchannel 208 to a receiver 211. During the transmission process via thephysical channel 208, disturbances 210 frequently occur, which corruptthe modulated signal 209 s.

[0086] At the receiver 211, this results in a modified modulated signal212

{tilde over (s)}:

→

,  (4)

[0087] which is supplied to a unit for demodulation 213 in the receiver211.

[0088] The modified modulated signal s 212 is demodulated in the unitfor demodulation 213. The unit for demodulation 213 outputs a vector

yε

^(n),  (5)

[0089] which is referred to as an electrical signal 214 in the followingtext and describes the digital, demodulated, modified signal.

[0090] The electrical signal y 214 is supplied to a unit for channeldecoding 215 of the electrical signal y 214, where it is subjected to aViterbi algorithm (which will be described in the following text) forchannel decoding of the electrical signal y 214. A sequence ofelectrical signals y is also referred to in the following text as asequence of physical signals.

[0091] The object of the channel decoding process is to carry outso-called soft decision decoding. This means that a code word isreconstructed and, furthermore, reliability information (a reliabilityvalue) is determined for each component, describing the decision madewith regard to reconstruction of a component of the code word. Acomponent of the reconstructed code word 216 is referred to in thefollowing text as a digital signal value.

[0092] The reconstructed code word 216, that is to say at least onedigital signal value, is supplied to a unit for source decoding 217, inwhich source decoding is carried out.

[0093] Finally, the decoded signal 218 is supplied to the sink 219.

[0094] In order to make it easier to understand the invention, theoutline structure of the Viterbi algorithm will be explained in thefollowing text (see FIG. 3). Details of the Viterbi algorithm aredescribed in [1].

[0095] For the purposes of this exemplary embodiment, a binary modulatedsignal is assumed, that is to say the Viterbi algorithm can be run usinga trellis which can be implemented by means of a butterfly structure300, as is illustrated in FIG. 3.

[0096] On the basis of the butterfly structure 300, two initial states,a first initial state m′ 301 and a second initial state m 302, are ineach case provided. The first initial state m′ 301 is obtained from theproduct of a state index i and the factor 2 (m′=2i) where, if aneight-bit word is to be processed, i=0, . . . , 127 (2⁷), and the secondstate m 302 is obtained for the respective state index i on the basism=2i+1.

[0097] At a time k, each initial state 301, 302 is allocated a statemetric M so that, for the first initial state m′ 301, the state metricrelating to the time k is thus indicated by M(k, m′=2i) and, for thesecond initial state m 302, the state metric relating to the time k isindicated by M(k, m=2i+1).

[0098] Without any restriction to generality, the rest of thedescription is based by way of example on the statements relating to theUMTS standard. The statements are equally applicable to the GSM/EDGEstandard, with a state in the GSM/EDGE standard being described by 6bits or 4 bits, respectively.

[0099] According to the exemplary embodiment, in which the physicalsignals are transmitted in accordance with the UMTS standard, a statewith an 8-bit word is preferably described, that is to say, if akdenotes a value of a bit at the time k, the first initial state is givenby 301 m′=(a_(k), a_(k−1), a_(k−2), a_(k−3), a_(k−4), a_(k−5), a_(k−6),a′_(k−7)) and the second initial state m 302 is given by m=(a_(k),a_(k−1), a_(k−2), a_(k−3), a_(k−4), a_(k−5), a_(k−6), a_(k−7)).

[0100] Analogously to the procedure in a shift register, a statetransition takes place by inputting (“shifting from the left”) a new bitvalue a_(k+1) relating to the time k+1, symbolized in FIG. 3 by statetransition arrows 303, 304, 305, 306 to a first end state m″ 307 and toa second end state m′″ 308.

[0101] The state transition, caused by the “shifting in” of the bita_(k+1) results, for the first end state 307 relating to the time k+1(with the state metric M(k+1, m″=i)) in:

[0102] m″=(a_(k+1), a_(k), a_(k−1), a_(k−2), a_(k−3), a_(k−4), a_(k−5),a_(k−6)).

[0103] The second end state 308 likewise has an associated state metric${M\left( {{k + 1},{m^{\prime\prime\prime} = {i + \frac{N}{2}}}} \right)}.$

[0104] Transition metrics I1, I2, I3, I4 are determined using theViterbi algorithm.

[0105] As can be seen, I1 clearly indicates the probability for a statetransition to the state m″ when the bit a_(k+1) has the logic value“zero” and the trellis was in the first initial state m′ 301.

[0106] As can be seen, I2 clearly indicates the probability of a statetransition to the state m″ when the bit a_(k+1) has the logic value“zero” and the trellis was in the second initial state m 302.

[0107] As can be seen, I3 denotes the probability of a state transitionto the state m′″ when the bit a_(k+1) has the logic value “one” and thetrellis was in the first initial state m′ 301.

[0108] As can be seen, I4 denotes the probability of a state transitionto the state m′″ when the bit a_(k+1) has the logic value “one” and thetrellis was in the second initial state m 302.

[0109] The new state metrics for the two end states m″ and m′″ areobtained using the Viterbi algorithm in accordance with the followingrules:

[0110] M(k+1, m″=i)=max(M(k, m′=2i)+I1, M(k, m=2i+1)+I2),${{M\left( {{k + 1},{m^{\prime\prime\prime} = {i + \frac{N}{2}}}} \right)} = {\max \left( {{{M\left( {k,{m^{\prime} = {2i}}} \right)} + {I\quad 3}},{{M\left( {k,{m = {{2i} + 1}}} \right)} + {I4}}} \right)}},$

[0111] where N denotes the number of states in the trellis, that is tosay, for 8 bits, N=256 states.

[0112] In accordance with the Viterbi algorithm, a forward determinationprocess is used, starting at a defined initial state which according tothe UMTS standard comprises a number, which can be predetermined, ofbits with the logic value “0”, for a successive determination processsuch that the state metrics for one point in time are determined for allthe initial states of the trellis, and the respective state transitionmetrics are determined in accordance with the butterfly structure 300.

[0113] Once the two state transition metrics have each been determinedwhich both lead to the same end state starting from different initialstates, then the sum of the respective state metrics and transitionmetrics is in each case formed, and the larger sum is selected and isallocated as the state metric to the corresponding end state 307, 308.

[0114] The bit a′_(k−7), a_(k−7) of the respective initial stateselected by the maximum selection process is stored in a path tracebackregister.

[0115] The method described above is carried out for all the states andall the time steps in the trellis until the overall end state of thesequence of physical signals, as defined in accordance with the UMTSstandard, is reached. The overall end state of the sequence of physicalsignals in accordance with the UMTS standard is once again apredetermined number of bits with the logic value “zero” (the sequenceof physical signals is terminated and is also referred to as “tailbits”).

[0116] Thus, as can be seen, based on the forward method, theinformation relating to the selected path of the two state transitions,or expressed in other words information about the initial state whichhas passed through the state transition to the respective end state ofthe butterfly structure 300, is thus in each case stored. The respectiveend state and the corresponding initial state differ only in two bits,in the following manner:

[0117] One new bit has been shifted into the “shift register” (the bita_(k+1)) and one bit (the “oldest”, that is to say the least significantbit a′_(k−7) or a_(k−7), which is referred to as the transition bit inthe following text) has been shifted out of the “shift register”.

[0118] Since the bit a_(k+1) that has been shifted in is part of thedirect designation of the respective end state, it is sufficient tostore only the transition bit a′k⁻⁷ or a_(k−7) in the path tracebackregister in order to make it possible to uniquely determine the maximumlikelihood path as described in the following text.

[0119] During the path traceback method, the transition bits a′_(k−7)and a_(k−7) are used in conjunction with the knowledge about the overallend state of the Viterbi algorithm which, in accordance with the UMTSstandard, ends in the overall end state with the logic value “zero”, inorder to reconstruct the maximum likelihood path in the trellis.

[0120] As is shown in FIG. 4, a start state 401 is known for the pathtraceback method, with the assumption being made that the path tracebackmethod is started at the time k. The start state 401 is denoted by thebits a_(k), a_(k−1), a_(k−2), a_(k−3), a_(k−4), a_(k−5), a_(k−6),a_(k−7) and forms a pointer 402 to an address in a path tracebackregister 404 for the time step k, which contains 256 values for a wordlength of 8 bits. 256 bits are stored for the time step k in the pathtraceback register 404 and can each be addressed uniquely by the 8 bitsof the start state 401.

[0121] The addressed bit 403 in the path traceback register 404 for thetime k is read, and the 8 bits a_(k), a_(k−1), a_(k−2), a_(k−3),a_(k−4), a_(k−5), a_(k−6), a_(k−7) which form the start state 401relating to the time k, are shifted “from the right” into the shiftregister. The most significant bit a_(k) relating to the time k isaccordingly shifted out of the shift register and is used as the decodedsignal value 405 relating to the time k.

[0122] The new word which is located in the shift register and whichforms a path traceback state 406 relating to the time k−1 (a_(k−1),a_(k−2), a_(k−3), a_(k−4), a_(k−5), a_(k−6), a_(k−7), selected bit 403from the path traceback register 404 relating to the time k) is onceagain used as a pointer 407 to a bit in a path traceback register 408for the time k−1. The addressed bit 409 in the path traceback register408 for the time k−1 is read, and a further state transition takes placein a further path traceback state relating to the time k−2. The mostsignificant bit a_(k−1) relating to the time k−1 is accordingly shiftedout of the shift register and is used as the decoded signal value 410relating to the time k−1.

[0123] The method sketched above is carried out for all the points intime until the initial state of the trellis, that is to say the time atwhich the first physical signal was received, has been determined.

[0124] It should be noted that each path traceback register relating toeach time with a word length of 8 bits has 256 bits for 256 states ineach case.

[0125] Based on this first “run” of the Viterbi algorithm, the pathtraceback method results in the so-called maximum likelihood path 501.

[0126] Once the maximum likelihood path 501 shown in the trellis 500 inFIG. 5 has been determined, the Viterbi algorithm is carried out asecond time, based on the procedure described in the following text.

[0127]FIG. 5 shows the respective states with the reference symbol 502for one time step in each case for the trellis 500.

[0128] The maximum likelihood path 501 contains the signal valuesdetermined using the path traceback method and which are used as thedecoded physical signals, that is to say as the decoded sequence of thephysical signals.

[0129] As is illustrated in FIG. 5, the subregion 503 is selected fromthe overall trellis 500.

[0130] The aim of the method described in the following text is todetermine the reliability values associated with the individual signalvalues, in the sense of a “worst case estimate”.

[0131] In the following text, the signal values of the maximumlikelihood path 501 are denoted Pr.TB(k−i) where k−i denotes the timesk, k−1, k−2, . . . , k−i that are located in the selected subregion 503.i denotes a sequential index for the times in the subregion 503.

[0132] As can be seen, the subregion 503 may be regarded as a windowwhich is in each case shifted by one time step, commencing at the startof the trellis 500 and being shifted through to the end of the trellis500.

[0133] According to the exemplary embodiment, a second path is formedrelating to the partial end state 504 of the maximum likelihood path 501which corresponds to the signal value relating to the time k.

[0134] As has been described above, the bit value which has been shiftedinto the shift register from a previous initial state 505 in order toreach the partial end state 504 on the maximum likelihood path 501 is infact known.

[0135] In order to determine a second path 506 within the trellis 500for the selected subregion 503 relating to the time k, the transitionbit which describes the transition from the state 505 to the partial endstate 504 on the maximum likelihood path 501 is inverted, and a renewedpath traceback method is carried out with the inverted bit, using thestored path traceback register for the time k (see FIG. 4). This is donein the same way, as described above in conjunction with FIG. 4, as faras the initial state of the trellis.

[0136] The result is the second path 506, which contains states 507.

[0137] Once the second path has been determined as far as the partialend state 504, a first reliability value is determined for the partialend state 504 in the selected subregion 503 for the time step k.

[0138] The first reliability value is obtained from the differencebetween the state metric of the partial end state 504 for the situationwhere the metric has been determined via the states of the maximumlikelihood path 501, and the state metric for the partial end state 504for the situation where the state metric has been determined via thestates 507 along the second path 506.

[0139] As can be seen, this difference represents a measure of thedecision certainty for the transition along the maximum likelihood path501.

[0140] If, by way of example, the difference is very small, then thismeans it would also have been possible to reach that state directly viathe second path 506 without involving a statically large error.

[0141] However, if the difference is very high, then this is anindication that the decision for the corresponding bit, that is to saythe state of the maximum likelihood path 501, is highly reliable.

[0142] First reliability values, which still need to be corrected, arethus determined with respect to the time k for all states on the maximumlikelihood path 501.

[0143] The following method is in each case carried out along thedirection symbolized by the arrow 508 in FIG. 5, for a time k−n, n=1, .. . , size of the selected subregion, for the state on the maximumlikelihood path 501, and with regard to the state on the second path506:

[0144] A check is carried out to determine whether the signal value,that is to say the bit, which has been decoded on the basis of themaximum likelihood path 501 is the same as the bit which would have beendecoded on the basis of the second path 506.

[0145] If this is the case, then the first reliability value remainsunchanged for the signal value of the respective state on the maximumlikelihood path 501.

[0146] If the decoded bits relating to a time k−n on the maximumlikelihood path 501 and on the second path 506 have different values,then the minimum of the first reliability value which is associated withthe respective state on the maximum likelihood path 501 relating to thetime k and that of the corresponding state on the maximum likelihoodpath 501 relating to the respective time k—n is determined and isallocated as a new first reliability value to the signal value on themaximum likelihood path 501 relating to the time k−n.

[0147] This method is carried out along the maximum likelihood path 501and along the second path 506 for all the states on the maximumlikelihood path 501 within the selected subregion 503.

[0148] This procedure is carried out for the subregion 503 in eachiteration, with the subregion 503 in each case being shifted by one timestep along the trellis 500 in the direction of the overall end state ofthe sequence of physical signals.

[0149] The iterative procedure will be explained further, in detail, inconjunction with FIG. 6.

[0150]FIG. 6 shows the trellis 500 as well as the maximum likelihoodpath 501.

[0151] In FIG. 6, it is assumed that the method starts at a first timestep k=0.

[0152] In a first step, a first subregion 601 is selected, whichcontains the states for two times (k=0, k=1).

[0153] As shown in FIG. 6, the first subregion 601 thus contains a firstbranch 602 of the maximum likelihood path 501.

[0154] A second path 604, which has only one branch 605, is determinedusing the method described above by inversion of the transition bit,starting with the partial end state 603 of the first subregion 601.

[0155] The reliability value S(1) is now determined for the firstpartial end state 603 by forming the difference of the metricsMs(k=1,m1) for the maximum likelihood path 602 and Mc(k=1,m1) for thesecond path 604, where Ms(1,m1) accordingly denotes the total metric forthe accumulated state metrics and transmission metrics along the maximumlikelihood path 501 as far as the first partial end state 603, generallyas far as the state m relating to the time k Ms (k, m). Mc(k,m) in acorresponding manner denotes the total metric of the accumulated statemetrics and transition metrics along the second path 604 as far as thesecond partial end state 603, in general as far as the state m relatingto the time k.

[0156] The first iteration is ended after forming the first reliabilityvalue for the time k=1 (S(1)).

[0157] A second subregion 606 is selected in a second iteration, whichnow contains the states of the trellis 500 for the times k=0, k=1, k=2.

[0158] In the second iteration, the selected second subregion 606 has asecond partial end state 607 on the maximum likelihood path 501.

[0159] On the basis of the second partial end state 607, a new path,which is referred to in the following text as the third path 608, is nowonce again determined by means of the conventional path traceback methodusing the path traceback register. Furthermore, both the statetransition metrics for the second branch 618 of the maximum likelihoodpath 501, which assesses the state transition from the second partialend state 603 to the second partial end state 607, are determined.

[0160] Furthermore, the state metric for the state 610 and the statetransition metric for the second partial end state 607, which is locatedon the third path 608, are determined along the third path 608.

[0161] The first reliability value S(2) for the time k=2 for the secondpartial end state 607 is once again determined using the following rule:

[0162] S(2)=Ms(2,m2)−Mc(2,m2).

[0163] In a further step, a check is carried out to determine whetherthe decoded bit for the time k=1 along the third path 608 starting fromthe second partial end state 607 is the same as the decoded bit for themaximum likelihood path 501 relating to the time k=1.

[0164] If they are not the same, the minimum is formed between thereliability value S(1), which is associated with the first partial endstate 603, and the first reliability value S(2) which is associated withthe second partial end state 607.

[0165] In a further step, the minimum value is allocated to the firstpartial end state 603.

[0166] This completes the second iteration.

[0167] In a third iteration, the window (the subregion) is shifted tothe right by one further time step, as can be seen, that is to say theselected third subregion 611 now contains states from four times, namelyk=0, k=1, k=2, k=3.

[0168] The method described above is carried out starting from a thirdpartial end state 612, such that a fourth path 613 is determined bymeans of a further path traceback method using the corresponding pathtraceback register.

[0169] The total metric along the fourth path 613, which is alsoreferred to as the concurrent path in the following text, is known fromthe state metric of the state 616 and from the state transition metricin the third partial end state 612.

[0170] Furthermore, the state transition metric is determined for thestate transition from the second partial end state 607 to the thirdpartial end state 612, symbolized by the third branch 617 on the maximumlikelihood path 501. The total metric along the maximum likelihood path501 is accordingly also known from the state metric for the secondpartial end state 607.

[0171] The first reliability value for the third partial end state 612is formed using the following rule:

[0172] S(3)=Ms(3,m3)−Mc(3,m3).

[0173] Once the first reliability value S(3) for the third partial endstate 612 has been determined, the respective first reliability value isor is not updated in accordance with the procedure described above forall the states which are located in the third subregion 611 on themaximum likelihood path 501.

[0174] This completes the third iteration.

[0175] In the fourth iteration, the subregion is once again shifted byone time step in the direction of the end of the trellis 500, so that afourth subregion 619 is chosen, which now contains states from fivetimes k=0, k=1, k=2, k=3, k=4.

[0176] A fifth path 621 relating to a fourth partial end state 620 onthe maximum likelihood path 501 is determined using the above procedure.

[0177] The first reliability value S(4) for the fourth partial end state620 is then determined using the following rule:

[0178] S(4)=Ms(4,m4)−Mc(4,m4).

[0179] Starting from the fourth partial end state 620, the firstreliability value is in each case updated or is not updated, inaccordance with the procedure described above, successively for previousstates in time.

[0180] Expressed in the form of an if/then request in a programminglanguage, a first reliability value for a respective partial end staterelating to a time k is or is not updated on the basis of the followingcondition:

[0181] If (Sec.TB(n_upd_k)=Pr.Tb(n))

[0182] Then

[0183] S(n)=S(n)

[0184] Else

[0185] S(n)=min (S(n), S(k))

[0186] End If-Then loop.

[0187] Sec.TB(n_upd_k) denotes the decoded bit relating to the time n onthe respective concurrent path (second path, third path, fourth path, .. . ) during the updating iteration k starting from a partial end stateon the maximum likelihood path 501 relating to the time k.

[0188] As can be seen, the procedure can be explained by the followingheuristic knowledge:

[0189] The respective first reliability value at the start of theiteration is the upper limit of the reliability value that is to beoutput. The smaller is the estimated reliability value for therespective partial end state, the more probable it is that that thepartial end state can also be reached via the respective further path.The intermediate reliability value for a state on the maximum likelihoodpath 501 must therefore be updated within the selected subregion if thecorresponding decoded bit relating to the corresponding time differsbetween the maximum likelihood path 501 and the further path.

[0190] Once the reliability values for all the states along the maximumlikelihood path 501 have been updated, the time window, that is to saythe subregion, is shifted by one time step further in the direction ofthe end of the trellis.

[0191] The new reliability value for the corresponding partial end staterelating to the time k+1 is estimated, the corresponding new furtherpath is determined, and the corresponding state metrics and statetransition metrics are determined and, once again, the reliabilityvalues for the states on the maximum likelihood path 501 within thesubregion of the k+1th iteration are updated.

[0192] It should be noted that the most recently updated value of theprevious subregion in time is finally determined, and is no longerconsidered in further iterations.

[0193] The reliability values of all the states in the time window onthe maximum likelihood path 501 are updated in each iteration dependingon the rule described above until the corresponding state falls out ofthe time window when shifted further.

[0194]FIG. 7 shows a block diagram of the Viterbi soft decision decodingunit 700 according to the exemplary embodiment of the invention.

[0195] The Viterbi decoding unit 700 is clocked via a clock input 701 byan external controller (not shown), for example a signal processor at afrequency of 52 MHz.

[0196] The Viterbi decoding unit 700 has an internal control unit 702, aunit 703 for storing the information relating to the decoding method(convolution polynomials), a transition metric determining unit 704, anend state metric determining unit 705, a reliability value determiningunit 706, and a path traceback unit 707.

[0197] Furthermore, a memory 708 is provided, which is subdivided intovarious subregions, for storing the soft input values, the tracebackinformation as well as the decoding bits and their reliabilityinformation.

[0198] In addition, a memory is provided for storage of the temporaryinformation, such as start metrics.

[0199] The transition metric determining unit 707 uses the decodinginformation, which is stored in the unit 703 for storing the informationrelating to the decoding method, for each transition in the trellis toform the theoretical coded output information, and combines this withthe received soft input values from the memory to form the transitionmetric values using the following rule:

[0200] (2x₁−1)S1+(2x²⁻¹)+(2x³⁻¹)S3

[0201] where

[0202] S1, S2, S3 denote the soft input values for the decoder, and

[0203] x₁, x₂, X₃ denote the theoretically coded output information.

[0204] The end state metric determining unit 705 is coupled to thetransition metric determining unit 704 such that the determined statetransition metrics can be supplied to it. The end state metricdetermining unit 705 contains four adders 709, 710, 711, 712, two units713, 714 for forming a maximum value from two previously formed sums, aswell as a path traceback register 715, which are formed on the basis ofthe butterfly structure 300 illustrated in FIG. 3.

[0205] The respective bits which result from the choice of the maximumsum from the state metric for the respective initial state of thebutterfly structure 300 and from the state transition metric and arethus shifted out of the shift register on the basis of the methoddescribed above are stored in the path traceback register 715.

[0206] The reliability values are determined by the reliability valuedetermining unit 706, which is coupled to the control unit 702 and isillustrated in detail in FIG. 1, using the method described above, andare stored in a second memory area 717 for storing the reliabilityvalues and the intermediate reliability values, which may still bechanged during the iterations.

[0207] Furthermore, the reliability value determining unit 706 iscoupled to the path traceback unit 707 such that the corresponding bit,that is to say the transition bit for the respective time step for thestates along the respective further path relating to the time stamp k,is supplied from the path traceback unit 707 to the reliability valuedetermining unit 706, as will be explained in the following text, ineach case via a first input 718, and the transition bit for therespective states on the maximum likelihood path is supplied from thepath traceback unit 707 to the reliability value determining unit 706via a second coupling 719.

[0208] The respectively determined state metrics and state transitionmetrics are stored in a third memory area 720.

[0209] Signal values that are intended to be output and finalreliability values which are associated with the signal values arestored in a fourth memory area 721.

[0210] The individual components are coupled to one another via a bus722.

[0211]FIG. 1 shows a sketch of the reliability value determining unit706, in detail. When the subregion has the maximum size of 45 timeunits, the reliability value determining unit 706 according to theexemplary embodiment has a first register 101 for storing the bits,decoded on the basis of the selected subregion, for the statetransitions along the maximum likelihood path.

[0212] The decoded bits are stored in a second register 102, likewisewith a length of 45 bits, according to the path traceback method, alongthe respectively determined concurrent path within the selectedsubregion.

[0213] One bit from the first register 101 and one bit from the secondregister 102, which each describe a decoded bit relating to the sametime, are in each case read via a selection unit (not shown) firstlyalong the maximum likelihood path 501 and along the further concurrentpath. These bits are supplied via two couplings, a first coupling 103and a second coupling 104, to an exclusive-OR gate as the comparisonunit 105.

[0214] One output 106 of the comparison unit 105 is connected to acontrol input 107 of a multiplexer 108. A first input 109 of themultiplexer 108 is coupled to an output 110 of a minimum selection unit111. A first input 112 of the minimum selection unit 111 is coupled to areliability value memory 113. A second input 114 of the minimumselection unit 111 is likewise coupled to the reliability value memory113. Furthermore, a second input 115 of the multiplexer 108 is likewisecoupled to the first input 112 of the minimum selection unit 111, sothat the reliability value which is present at the first input 112 ofthe minimum selection unit 111 is also present at the second input 115of the multiplexer 108.

[0215] One output 116 of the multiplexer 108 is likewise coupled to thereliability value memory 113.

[0216] The control unit 702 controls the reliability value determiningunit 706 such that the first reliability value is formed by asubtraction unit 117 in each case for a time k and a state m on themaximum likelihood path, and is stored as the first reliability valueS(k) for the respective iteration in which the time step k describes thetime step in which the respective partial end state is located.

[0217] Furthermore, the reliability value memory 113 is used to storethe reliability values and intermediate reliability values S(k−i)determined using the method described above.

[0218] The corresponding total metrics for the respective partial endstate along the maximum likelihood path 501 are supplied by the endstate metric determining unit 705 to the reliability value determiningunit 706.

[0219] Once the first reliability value S(k) relating to the time k hasbeen determined, the control unit 702 selects reliability values S(k−i)which have not been updated relating to the time k−i, and supplies theseto the first input 112 of the minimum selection unit 111.

[0220] The first reliability value S(k) is supplied to the second input114 of the minimum selection unit 111.

[0221] The minimum of the two reliability values is thus produced at theoutput 110 of the minimum selection unit 111, and is hence also appliedto the first input 109 of the multiplexer 108.

[0222] The reliability value S(k−i) is applied to the second input 115of the multiplexer 108.

[0223] If the check which is carried out by means of the exclusive-ORgate 105 results in the two selected bits from the first register 101and from the second register 102 differing, then the multiplexer 108 isswitched by the output signal from the exclusive-OR gate 105 such thatthe signal which is applied to the first input 109 of the multiplexer108 is passed through to the output 116 of the multiplexer 108, and thisvalue replaces the previous reliability value S(k−i), which was appliedto the first input 112 of the minimum selection unit 111, as the updatedreliability value S(k−i)_upd.

[0224] The reliability value memory 113 is coupled via the bus 722 tothe fourth memory area 721 so that, after carrying out the second “run”of the Viterbi algorithm, the determined reliability values are storedin the fourth memory area 721.

[0225]FIG. 8 shows the path traceback unit 707 in detail.

[0226] The path traceback unit allows both the maximum likelihood pathand the further concurrent paths to be traced back. This correspondinglymeans that input signals exist which refer to both path types and whichcan be supplied in multiplexed form to the internal logic state.

[0227] The path traceback unit 707 has a first multiplexer 801 which iscoupled via a control input 802 to the control unit 702 (see FIG. 7).The control input 802 is used to select whether information relating tothe maximum likelihood path 501 or relating to the respective furtherconcurrent path is selected by the first multiplexer 801. A stop signalfor stopping the processing of information relating to the further pathis supplied to the multiplexer 801 via a first stop input 803. A stopsignal for stopping the processing of information relating to themaximum likelihood path 501 is supplied to the multiplexer 801 via asecond stop input 804.

[0228] The respective start state for the path traceback method withinthe further path is supplied to the multiplexer 801 at a first input805.

[0229] The information as to whether the first transition bit need beinverted for tracing back the further path is supplied to the firstmultiplexer 801 via a second input 806. The second input 806 is activeat the start of the traceback method via the concurrent path, and isinactive during the rest of the traceback method.

[0230] The respective time k to which the start state relates issupplied to the first multiplexer 801 via a third input 807.

[0231] The start state for the maximum likelihood path 501 is suppliedto the first multiplexer 801 via a fourth input 808.

[0232] The time to which the start state of the maximum likelihood path501 relates is supplied to the first multiplexer 801 via a fifth input809.

[0233] A stop signal 810 is supplied from the first multiplexer 801 tothe control unit 703 and is used to indicate the completion of the pathtraceback method.

[0234] The address of the respective path traceback register 715 to beread within the first memory area 716 is produced by the control unit703, and the corresponding bits of the selected path traceback register715 are read in as input data 811 from the RAM and are supplied to asecond multiplexer 812.

[0235] The second multiplexer 812 is controlled by the control unit 703via a control input 813. The start conditions, which are selected by thefirst multiplexer 801, that is to say the respective start state and therespective start time, are supplied to a first input 814 of a thirdmultiplexer 815.

[0236] The third multiplexer 815 thus receives start information fromthe maximum likelihood path or from the concurrent path.

[0237] The third multiplexer 815 is controlled by the control unit 703via a controlled input 816 of the third multiplexer 816.

[0238] The start conditions of the input 814 of the third multiplexer815 select one bit from the path traceback register for the start timeas shown in FIG. 4 (403), which is referred to as the “traceback value”or as the “transition bit”, which is attached to the current statevector on the right and thus forms the new pointer value 818. From nowon, the respective pointers which are supplemented in each time stepselect the transition bit of the respectively previous time step.

[0239] A second input 817 of the third multiplexer 815 is supplied witha value which represents the respectively new pointer value 818 of theprevious time step in time and of the state in the trellis 500 on thebasis of the path traceback register 715 loaded into the secondmultiplexer 812, and on the basis of the associated transition bit whichis determined by the pointer for determining the transition bit 819.

[0240] The path traceback unit requires information relating to thecoding method that is used, such as the number of states and hence thenumber of bits in the state vector. This information is required notonly for producing the new pointer value but also for preselection ofthe path traceback register 715 (size of the path traceback register715).

[0241] The bit which is shifted out on the basis of the path tracebackmethod described above is used as a decoded bit, which corresponds tothe corresponding signal value on the maximum likelihood path or on thefurther path.

[0242] The decoded bit 820, that is to say the bit which is shifted outof the corresponding shift register, is supplied to an input 822 of afourth multiplexer 821.

[0243] The bit is supplied to a first output 824 or to a second output825 depending on a control signal at a control input 823 of the fourthmultiplexer 821. If the bit is supplied to the first output 824, thenthis means that the bit is associated with the further path. If the bitis supplied to the second output 825, then this means that the bit isassociated with the associated likelihood path.

[0244] The control unit 702 is set up such that the method stepsdescribed above can be carried out by the reliability value determiningunit 706 and the corresponding further units of the Viterbi decodingunit 700.

[0245] The following publications are cited in this document:

[0246] [1] G. D. Fomey, The Viterbi-Algorithm, Proceedings of the IEEE,Vol. 61, No. 3, pages 268-278, 1973

[0247] [2] J. Hagenauer, P. Hoeher, A Viterbi Algorithm withSoft-Decision Outputs and its Applications, pages 1680-1686, GLOBECOM,1989

[0248] [3] J. Hagenauer, Source-Controlled Channel Decoding, IEEETransaction on Communications, Vol. 43, No. 9, pages 2449-2457,September 1995

[0249] [4] C. Berrou et al, A Low Complexity Soft-Output Viterbi DecoderArchitecture, ICC 93.

[0250] [5] U.S. Pat. No. 5,406,570

[0251] [6] Patent Abstracts of Japan JP 11186914 A

[0252] [7] U.S. Pat. No. 5,784,392

[0253] List of Reference Symbols

[0254]101 First register

[0255]102 Second register

[0256]103 First coupling

[0257]104 Second coupling

[0258]105 Comparison unit

[0259]106 Comparison unit output

[0260]107 Multiplexer control input

[0261]108 Multiplexer

[0262]109 Multiplexer first input

[0263]110 Minimum selection unit output

[0264]111 Minimum selection unit

[0265]112 Minimum selection unit first input

[0266]113 Reliability value memory

[0267]114 Minimum selection unit second input

[0268]115 Multiplexer second input

[0269]116 Multiplexer output

[0270]200 Transmitter

[0271]201 Source

[0272]202 Message

[0273]203 Source coder

[0274]204 Code word

[0275]205 Unit for channel coding

[0276]206 Channel code word

[0277]207 Unit for modulation 207 of the channel code word

[0278]208 Physical channel

[0279]209 Modulated signal

[0280]210 Disturbance

[0281]211 Receiver

[0282]212 Modified modulated signal

[0283]213 Unit for demodulation

[0284]214 Electrical signal

[0285]215 Unit for channel decoding

[0286]216 Reconstructed code word

[0287]217 Source decoding

[0288]218 Decoded signal

[0289]219 Sink

[0290]300 Butterfly structure

[0291]301 First initial state

[0292]302 Second initial state

[0293]303 State transition arrow

[0294]304 State transition arrow

[0295]305 State transition arrow

[0296]306 State transition arrow

[0297]307 First end state

[0298]308 Second end state

[0299] I1 First state transition metric

[0300] I2 Second state transition metric

[0301] I3 Third state transition metric

[0302] I4 Fourth state transition metric

[0303]401 Start state path traceback method

[0304]402 Pointer to a bit in the path traceback register for the time k

[0305]403 Bit in the path traceback register for the time k

[0306]404 Path traceback register for the time k

[0307]405 Decoded signal value for the time k

[0308]406 Path traceback state for the time k−1

[0309]407 Pointer to a bit in the path traceback register for the timek-1

[0310]408 Path traceback register for the time k−1

[0311]409 Bit in the path traceback register for the time k−1

[0312]410 Decoded signal value for the time k−1

[0313]500 Trellis

[0314]501 Maximum likelihood path

[0315]502 States in the trellis

[0316]503 Subregion

[0317]504 Partial end state

[0318]505 State preceding the partial end state on the maximumlikelihood path

[0319]506 Second path

[0320]507 States of the second path

[0321]508 Arrow

[0322] Pr.TB(k-j) Transition bit on the maximum likelihood path

[0323] Sec.TB(k-j) Transition bit on the second path

[0324]601 First subregion

[0325]602 First branch maximum likelihood path

[0326]603 First partial end state

[0327]604 Second path

[0328]605 Branch on second path

[0329]606 Second subregion

[0330]607 Second partial end state

[0331]608 Third path

[0332]609 State on the third path

[0333]610 State on the third path

[0334]611 Third subregion

[0335]612 Third partial end state

[0336]613 Fourth part

[0337]614 State of the fourth path

[0338]615 State of the fourth path

[0339]616 State of the fourth path

[0340]617 First branch on the maximum likelihood path

[0341]618 Second branch on the maximum likelihood path

[0342]619 Fourth subregion

[0343]620 Fourth partial end state

[0344]621 Fifth path

[0345]622 State on the fifth path

[0346]623 State on the fifth path

[0347]624 State on the fifth path

[0348]625 State on the fifth path

[0349]700 Viterbi decoding unit

[0350]701 Clock input

[0351]702 Control unit

[0352]703 Signal reception memory

[0353]704 Metric determining unit

[0354]705 End state determining unit

[0355]706 Reliability value determining unit

[0356]707 Path traceback unit

[0357]708 Memory

[0358]709 Adder

[0359]710 Adder

[0360]711 Adder

[0361]712 Adder

[0362]713 Maximum selection unit

[0363]714 Maximum selection unit

[0364]715 Path traceback register

[0365]716 First memory area

[0366]717 Second memory area

[0367]718 First coupling

[0368]719 Second coupling

[0369]720 Third memory area

[0370]721 Fourth memory area

[0371]722 Bus

[0372]801 First multiplexer

[0373]802 Multiplexer control unit

[0374]803 First stop input

[0375]804 Second stop input

[0376]805 First multiplexer first input

[0377]806 First multiplexer second input

[0378]807 First multiplexer third input

[0379]808 First multiplexer fourth input

[0380]809 First multiplexer fifth input

[0381]810 Stop signal

[0382]811 Input data

[0383]812 Second multiplexer

[0384]813 Second multiplexer control input

[0385]814 Third multiplexer first input

[0386]815 Third multiplexer

[0387]816 Third multiplexer control input

[0388]817 Third multiplexer second input

[0389]818 New pointer value for the next state in time in trellis

[0390]819 Transition bit

[0391]820 Decoded bit

[0392]821 Fourth multiplexer

[0393]822 Fourth multiplexer input

[0394]823 Fourth multiplexer control input

[0395]824 Fourth multiplexer first output

[0396]825 Fourth multiplexer second output

[0397]901 Trellis half

[0398]802 First subregion

[0399]903 Second subregion

1. A method for decoding a sequence of physical signals, in which aViterbi algorithm is carried out a first time for all physical signals,as a result of which a maximum likelihood path is determined along theoverall trellis which results on the basis of the Viterbi algorithm, andwith one signal value being determined for each physical signal, inwhich a reliability value is determined for each signal value of themaximum likelihood path determined on the basis of the Viterbialgorithm, in which the Viterbi algorithm is carried out a second time,with the following method steps being carried out iteratively until allthe signal values of the determined trellis have been taken intoaccount: a) one subregion of the trellis is selected, with thatsubregion having a partial initial signal value and a partial end signalvalue on the maximum likelihood path, b) at least one further path isdetermined in that subregion of the trellis which ends at the partialend signal value of the maximum likelihood path, c) each signal value onthe further path is compared with each signal value on the maximumlikelihood path, d) the minimum of the reliability value associated withthe signal value and of the reliability value of the partial end signalvalue is formed for each signal value on the maximum likelihood path, e)the reliability value or the minimum is selected and is associated withthe respective signal value according to a predetermined criterion, andin which the determined signal values and the selected reliabilityvalues associated with the signal values are used as the decodedsequence.
 2. The method as claimed in claim 1, in which a binary valueis used as the signal value.
 3. The method as claimed in claim 1 or 2,in which at least one initial signal value is predetermined at the startof the sequence of physical signals and/or at least one end signal valueis predetermined at the end of the sequence of physical signals.
 4. Themethod as claimed in one of claims 1 to 3, in which an area which has apredetermined number of signal values is in each case selected as thesubregion of the trellis.
 5. The method as claimed in claim 4, in whicha number of signal values are each used as one subregion of the trellis,with this number being dependent on the reversion depth of theconvolution polynomial that is used.
 6. The method as claimed in one ofclaims 1 to 5, in which the further path is determined in the followingway: the transition bit which has led to the partial end signal valueaccording to the maximum likelihood path is inverted, a path tracebackmethod is carried out by means of path traceback information which wasdetermined during the first run of the Viterbi algorithm and during thecurrent run of the Viterbi algorithm, based on the partial end signalvalue, and with the renewed path traceback method being started with theinverted transition bit.
 7. The method as claimed in one of claims 1 to6, in which the difference between accumulated signal value metricswhich are formed on the basis of the Viterbi algorithm is used as thereliability value.
 8. The method as claimed in claim 7, in which thedifference between accumulated signal value metrics or the minimum ofthe reliability value and the reliability value of the partial endsignal value is in each case chosen for the signal value, and isassociated with the signal value.
 9. A reliability value determiningunit for determining a reliability value in the course of a Viterbialgorithm, having a first path memory for storing signal values of amaximum likelihood path on the basis of the Viterbi algorithm, a secondpath memory for storing signal values of a further path on the basis ofthe Viterbi algorithm, a first selection unit, which is coupled to thefirst path memory and to the second path memory, for selecting signalvalues from the first path memory and from the second path memory, acomparison unit, which is coupled to the first selection unit, forcomparing the selected signal values from the first path memory and fromthe second path memory, a second selection unit which has, a) a controlinput which is coupled to the output of the comparison unit, b) a firstinput which is coupled to the output of a third selection unit, c) asecond input, a reliability value memory for storing reliability values,a control unit which is set up such that a) a previously determined andstored first reliability value, which is associated with a signal valueon the maximum likelihood path, can be supplied from the reliabilityvalue memory to a first input of the third selection unit, b) apreviously determined and stored second reliability value which isassociated with a signal value on the maximum likelihood path can besupplied from the reliability value memory to a second input of thethird selection unit, c) the first reliability value can be supplied tothe second input of the second selection unit, d) the value which isselected by the second selection unit can be stored as the firstreliability value, in which case, if the selected signal values from thefirst path memory and from the second path memory are not the same, thecomparison unit can supply a control signal to the second selection unitsuch that the second selection unit can select that reliability valuewhich is applied to its first input and has been selected by the thirdselection unit.
 10. The reliability value determining unit as claimed inclaim 9, in which the control unit is set up such that a previouslydetermined and stored second reliability value, which is associated withthe partial end signal value of the maximum likelihood path, can besupplied from the reliability value memory to the second input of thethird selection unit.
 11. The reliability value determining unit asclaimed in claim 9 or 10, in which the second selection unit is amultiplexer.
 12. The reliability value determining unit as claimed inone of claims 9 to 11, in which the first selection unit is set up suchthat signal values are in each case selected for the same time unit. 13.The reliability value determining unit as claimed in one of claims 9 to12, in which the third selection unit is set up such that it selects thelower reliability value of the first reliability value and the secondreliability value.
 14. The reliability value determining unit as claimedin one of claims 9 to 13, in which the control unit is set up such thatthe reliability values of all the signal values of the maximumlikelihood path can be supplied iteratively as the first reliabilityvalue to the first input of the third selection unit.
 15. A Viterbidecoding unit having a reliability value determining unit as claimed inone of claims 9 to
 14. 16. A device for decoding a sequence of physicalsignals, having a processor which is set up such that the followingmethod steps can be carried out: a maximum likelihood path along theoverall trellis which results on the basis of the Viterbi algorithm isdetermined for all the physical signals based on a first run of aViterbi algorithm, as a result of which one signal value is determinedfor each physical signal, a reliability value is determined for eachsignal value of the maximum likelihood path determined on the basis ofthe Viterbi algorithm, the Viterbi algorithm is carried out a secondtime, with the following method steps being carried out iterativelyuntil all the signal values of the determined trellis have been takeninto account: a) one subregion of the trellis is selected, with thatsubregion having a partial initial signal value and a partial end signalvalue on the maximum likelihood path, b) at least one further path isdetermined in that subregion of the trellis which ends at the partialend signal value of the maximum likelihood path, c) each signal value onthe further path is compared with each signal value on the maximumlikelihood path, d) the minimum of the reliability value associated withthe signal value and of the reliability value of the partial end signalvalue is formed for each signal value on the maximum likelihood path, e)the reliability value or the minimum is selected and is associated withthe respective signal value according to a predetermined criterion, andthe determined signal values and the selected reliability valuesassociated with the signal values are used as the decoded sequence. 17.The device as claimed in claim 16, having a transition metricsdetermining unit for determining a transition metric, having an endstate metric determining unit, which is coupled to the transition metricdetermining unit, for determining an end state metric, having areliability value determining unit which is coupled to the end statemetric determining unit, and having a path traceback unit, which iscoupled to the reliability value determining unit and to the end statedetection metric determining unit, for determining path tracebackinformation.
 18. The device as claimed in claim 16 or 17, having amemory with a memory area for storing path traceback information and/orhaving a second memory area for storing soft input information for thedecoding unit and/or with a third memory area for storing determinedstate metrics and state transition metrics and/or with a fourth memoryarea for storing signal values which are intended to be output, andreliability values associated with the signal values.
 19. The device asclaimed in claim 18, in which at least one of the memory areas is in theform of RAM.
 20. The device as claimed in one of claims 17 to 19, inwhich the path traceback unit has the following components: a controlunit, a multiplexer which is coupled via a control input to the controlunit, in which case it is possible to use the control unit to selectwhether information about the maximum likelihood path or about therespective further concurrent path is selected by the first multiplexer,in which case the respective start state for the path traceback methodwithin the further concurrent path can be supplied to a first input ofthe first multiplexer, in which case information as to whether atransition bit is intended to be inverted for the traceback of thefurther path can be supplied as a second input of the first multiplexer,in which case the respective time to which the start state relates canbe supplied at a third input of the first multiplexer, in which case therespective start state of the maximum likelihood path can be supplied ata fourth input of the first multiplexer, and in which case therespective time to which the start state of the maximum likelihood pathrelates can be supplied as a fifth input of the first multiplexer.